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I have attached an image describing my problem. I have an EPT-5M57-AP-M4 board and the documentation contains images showing header names on the pins but many of them are not listed in the pin mapping chart and many of the names on the chart do not appear in the image headers. Names such as BD_INOUT0, BC_IN1, TR_DIR_1, or U7, U4, U5... I have a feeling that I'm looking at the wrong chart. Would someone please help clarify this? Thanks!
Topic starter
Posted : 08/09/2022 3:58 pm
ruhiparveen liked
Hello, we have updated the Data Sheet for the MegaProLogic. A table was added that maps the signals from the connector pins to the I/O pins on the CPLD.
Posted : 12/09/2022 7:12 pm
ruhiparveen liked