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Author Topic: DSO 4 Channel 15 MHz Development Update
Posts: 20
Post DSO 4 Channel 15 MHz Development Update
on: August 16, 2016, 21:33

Progress is being made to complete the DSO board. After several weeks of back and forth between me and the board house to fix DFM problems, I finally have V2 boards in hand.

I am waiting to assemble these boards until I complete the V2 of the Verilog code. Once the boards are assembled, I need to test the analog section and the digital ADC multiplexor circuit. I am hopeful there are no errors with these circuits and this will be the final design.

Verilog Code Progress
I have added the sample rate increment/decrement section into the code and it works fine. I am currently adding the I2C section into the Verilog. This V2 of the Verilog is about 70% complete. I am hopeful I can get the code completed, simulated and tested in the next two weeks. Once that is complete, I can assemble a couple of the new PCBs and perform the full testing. The DSO application will need debugging and modification to work properly.

DSO Application
I added the sample rate increment/decrement section to the application and tested it out. The code works at the highest rated speed. There doesn't appear to be any speed related problems which is a big step forward. Here is a screen capture of the high speed operation.

The DSO board can push alot of data into the PC and the dll has to have the ability to process all the data without dropping any information. This application needs further debugging as you can see the four signals should be straight lines at their respective voltages, +0.2V, +0.4V, +0.5V and +0.6V.
Progress has been slow this summer, but I don't see any major problems moving forward. Hopefully, the analog and multiplexor sections of the PCB were designed correctly. If there are no major problems, then we could be about three to four weeks away from completion of the design and software. Then we can go into production. After that, we will prepare another Kickstarter just for the DSO board.

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